december 2013 FCP104N60F ? n-channel superfet ? ii frfet ? mosfet ?2013 fairchild semiconductor corporation FCP104N60F rev. c1 www.fairchildsemi.com 1 FCP104N60F n-channel superfet ? ll frfet ? mosfet 600 v, 37 a, 104 m features ?650 v @ t j = 150c ?typ. r ds(on) = 91 m ? ultra low gate charge (typ. q g = 110 nc) ? low effective output capacitance (typ. c oss(eff.) = 313 pf) ? 100% avalanche tested ?rohs compliant applications ? lighting ? solar inverter ? ac-dc power supply description superfet ? ii mosfet is fairchil d semiconductor?s brand-new high voltage super-junction (sj) mosf et family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. this technology is tailored to minimize conduction loss, provide superior switching perfor- mance, dv/dt rate and higher avalanche energy. consequently, superfet ii mosfet is very suitable for the switching power applications such as pfc, server/telecom power, fpd tv power, atx power and industrial power applications. superfet ii fr- fet ? mosfet?s optimized body diode reverse recovery perfor- mance can remove additional component and improve system reliability. absolute maximum ratings t c = 25 o c unless otherwise noted . thermal characteristics symbol parameter FCP104N60F unit v dss drain to source voltage 600 v v gss gate to source voltage - dc 20 v - ac (f > 1hz) 30 v i d drain current - continuous (t c = 25 o c) 37 a - continuous (t c = 100 o c) 24 i dm drain current - pulsed (note 1) 114 a e as single pulsed avalanche energy (note 2) 809 mj i ar avalanche current (note 1) 6.8 a e ar repetitive avalanche energy (note 1) 3.57 mj dv/dt mosfet dv/dt 100 v/ns peak diode recovery dv/dt (note 3) 50 p d power dissipation (t c = 25 o c) 357 w - derate above 25 o c2.85w/ o c t j , t stg operating and storage temperature range -55 to +150 o c t l maximum lead temperature for soldering, 1/8? from case for 5 seconds 300 o c symbol parameter FCP104N60F unit r jc thermal resistance, junction to case, max. 0.35 o c/w r ja thermal resistance, junction to ambient ,max. 62.5 to-220 g d s g s d
FCP104N60F ? n-channel superfet ? ii frfet ? mosfet ?2013 fairchild semiconductor corporation FCP104N60F rev. c1 www.fairchildsemi.com 2 package marking and ordering information electrical characteristics t c = 25 o c unless otherwise noted. off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics part number top mark package packing method reel size tape width quantity FCP104N60F FCP104N60F to-220 tube n/a n/a 50 units symbol parameter test conditions min. typ. max. unit bv dss drain to source breakdown voltage v gs = 0 v, i d = 10 ma, t j = 25 o c 600 - - v v gs = 0 v, i d = 10 ma, t j = 150 o c 650 - - bv dss / t j breakdown voltage temperature coefficient i d = 10 ma, referenced to 25 o c-0.67-v/ o c bv ds drain to source avlanche breakdown voltage v gs = 0 v, i d = 18.5 a - 700 - v i dss zero gate voltage drain current v ds = 480 v, v gs = 0 v - - 10 a v ds = 480 v, t c = 125 o c--100 i gss gate to body leakage current v gs = 20 v, v ds = 0 v - - 100 na v gs(th) gate threshold voltage v gs = v ds , i d = 250 a3-5v r ds(on) static drain to source on resistance v gs = 10 v, i d = 18.5 a - 91 104 m g fs forward transconductance v ds = 20 v, i d = 18.5 a - 33 - s c iss input capacitance v ds = 25 v, v gs = 0 v, f = 1 mhz - 4610 6130 pf c oss output capacitance - 3255 4330 pf c rss reverse transfer capacitance - 155 235 pf c oss output capacitance v ds = 380 v, v gs = 0 v, f = 1 mhz - 74 - pf c oss eff. effective output capacitance v ds = 0 v to 480 v, v gs = 0 v - 313 - pf q g(tot) total gate charge at 10v v ds = 380 v, i d = 18.5 a, v gs = 10 v (note 4) - 110 145 nc q gs gate to source gate charge - 24 - nc q gd gate to drain ?miller? charge - 44 - nc esr equivalent series resistance f = 1 mhz - 0.9 - t d(on) turn-on delay time v dd = 380 v, i d = 18.5 a, v gs = 10 v, r g = 4.7 (note 4) -3478ns t r turn-on rise time - 20 50 ns t d(off) turn-off delay time - 102 214 ns t f turn-off fall time - 5.7 21.4 ns i s maximum continuous drain to source diode forward current - - 37 a i sm maximum pulsed drain to source diode forward current - - 114 a v sd drain to source diode forward voltage v gs = 0 v, i sd = 18.5 a - - 1.2 v t rr reverse recovery time v gs = 0 v, i sd = 18.5 a, di f /dt = 100 a/ s - 143 - ns q rr reverse recovery charge - 885 - nc notes: 1. repetitive rating: pulse-width limited by maximum junction temperature. 2. i as = 6.8 a, v dd = 50 v, r g = 25 , starting t j = 25 c. 3. i sd 18.5 a, di/dt 200 a/ s, v dd bv dss , starting t j = 25 c. 4. essentially independent of operating temperature typical characteristics.
FCP104N60F ? n-channel superfet ? ii frfet ? mosfet ?2013 fairchild semiconductor corporation FCP104N60F rev. c1 www.fairchildsemi.com 3 typical characteristics figure 1. on-region characteristics f igure 2. transfer characteristics figure 3. on-resistance variation vs. fi gure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics fi gure 6. gate charge characteristics 0.1 1 10 1 10 100 *notes: 1. 250 s pulse test 2. t c = 25 o c i d , drain current [a] v ds , drain to source voltage[v] v gs = 20.0v 15.0v 10.0v 8.0v 7.0v 6.5v 5.5v 45678 1 10 100 -55 o c 150 o c *notes: 1. v ds = 20v 2. 250 s pulse test 25 o c i d , drain current [a] v gs , gate to source volta g e [ v ] 0 20406080100120 0.05 0.10 0.15 0.20 *note: t c = 25 o c v gs = 20v v gs = 10v r ds(on) [ ], drain to source on-resistance i d , drain current [a] 0.20.40.60.81.01.21.41.6 0.1 1 10 100 -55 o c *notes: 1. v gs = 0v 2. 250 s pulse test 150 o c i s , reverse drain current [a] v sd , body diode forward voltage [v] 25 o c 0.1 1 10 100 600 0.1 1 10 100 1000 10000 100000 c oss c iss c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd *note: 1. v gs = 0v 2. f = 1mhz c rss capacitances [pf] v ds , drain to source voltage [v] 0 20406080100120 0 2 4 6 8 10 *note: i d = 18.5a v ds = 120v v ds = 300v v ds = 480v v gs , gate to source voltage [v] q g , total gate charge [nc]
FCP104N60F ? n-channel superfet ? ii frfet ? mosfet ?2013 fairchild semiconductor corporation FCP104N60F rev. c1 www.fairchildsemi.com 4 typical characteristics (continued) figure 7. breakdown voltage variation figure 8. on-resistance variation vs. temperature vs. temperature figure 9. maximum safe operating area figure 10. maximum drain current vs. case temperature figure 11. transient thermal response curve -100 -50 0 50 100 150 200 0.85 0.90 0.95 1.00 1.05 1.10 1.15 *notes: 1. v gs = 0v 2. i d = 10ma bv dss , [normalized] drain to source breakdown voltage t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 *notes: 1. v gs = 10v 2. i d = 18.5a r ds(on) , [normalized] drain to source on-resistance t j , junction temperature [ o c] 25 50 75 100 125 150 0 10 20 30 40 i d , drain current [a] t c , case temperature [ o c] 0.1 1 10 100 1000 0.1 1 10 100 300 10 s 100 s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) *notes: 1. t c = 25 o c 2. t j = 150 o c 3. single pulse dc 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 0.001 0.01 0.1 1 0.01 0.1 0.2 0.05 0.02 *notes: 1. z jc (t) = 0.35 o c/w max. 2. duty factor, d= t 1 /t 2 3. t jm - t c = p dm * z jc (t) 0.5 single pulse z jc (t), thermal response [ o c/w ] t 1 , rectangular pulse duration [sec] t 1 p dm t 2
FCP104N60F ? n-channel superfet ? ii frfet ? mosfet ?2013 fairchild semiconductor corporation FCP104N60F rev. c1 www.fairchildsemi.com 5 figure 12. gate charge test circuit & waveform figure 13. resistive switch ing test circuit & waveforms figure 14. unclamped inductive switching test circuit & waveforms v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v gs i g = const.
FCP104N60F ? n-channel superfet ? ii frfet ? mosfet ?2013 fairchild semiconductor corporation FCP104N60F rev. c1 www.fairchildsemi.com 6 figure 15. peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
FCP104N60F ? n-channel superfet ? ii frfet ? mosfet ?2013 fairchild semiconductor corporation FCP104N60F rev. c1 www.fairchildsemi.com 7 mechanical dimensions figure 16. to-220, molded, 3-lead, jedec variation ab (delta) package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packag ing area for the most recent package drawings: http://www.fairchildsemi.com/package/packagedetails.html?id=pn_tt220-0i3
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